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Ordering number : EN 5580A
CMOS LSI
LC75833E, 75833W, 75833JE
1/3 Duty General-Purpose LCD Display Drivers
Overview
The LC75833E, LC75833W, and LC75833JE are 1/3-duty general-purpose LCD display drivers that can be used for frequency display in electronic tuners under the control of a microcontroller. The LC75833E and LC75833W can drive an LCD with up to 105 segments directly, the LC75833JE can drive an LCD with up to 93 segments directly. The LC75833E and LC75833W and LC75833JE can also control up to 8 general-purpose output ports. Since the LC75833E, LC75833W, and LC75833JE use separate power supply systems for the LCD drive block and the logic block, the LCD driver block power-supply voltage can be set to any voltage in the range 2.7 to 6.0 volts, regardless of the logic block power-supply voltage.
Package Dimensions
unit: mm 3156-QFP48E
[LC75833E]
SANYO: QFP48E
Features
* Supports both 1/3 duty 1/2 bias and 1/3 duty 1/3 bias LCD drive under serial data control. LC75833E, LC75833W: up to 105 segments LC75833JE: up to 93 segments (without the S12, S23, S24, S35 segment output pins from the LC75833E, LC75833W) * Serial data input supports CCB format communication with the system controller. * Serial data control of the power-saving mode based backup function and all the segments forced off function * Serial data control of switching between the segment output port and the general-purpose output port functions * High generality, since display data is displayed directly without decoder intervention. * Independent VLCD for the LCD driver block (VLCD can be set to any voltage in the range 2.7 to 6.0 volts, regardless of the logic block power-supply voltage.) * The INH pin can force the display to the off state. * RC oscillator circuit
* CCB is a trademark of SANYO ELECTRIC CO., LTD. * CCB is SANYO's original bus format and all the bus addresses are controlled by SANYO.
unit: mm 3163A-SQFP48
[LC75833W]
SANYO: SQFP48
unit: mm 3148-QFP44MA
[LC75833JE]
SANYO: QIP44MA
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
33098HA(OT)/22897HA(OT) No. 5580-1/19
LC75833E, 75833W, 75833JE
Specifications
Absolute Maximum Ratings at Ta = 25C, VSS = 0 V
Parameter Maximum supply voltage Symbol VDD max VLCD max VIN 1 Input voltage VIN 2 VIN 3 Output voltage VOUT 1 VOUT 2 IOUT 1 Output current IOUT 2 IOUT 3 Allowable power dissipation Operating temperature Storage temperature Pd max Topr Tstg VDD VLCD CE, CL, DI, INH OSC VLCD 1, VLCD 2 OSC S1 to S35, COM1 to COM3, P1 to P8 S1 to S35 COM1 to COM3 P1 to P8 Ta = 85C Conditions Ratings -0.3 to +7.0 -0.3 to +7.0 -0.3 to +7.0 -0.3 to VDD + 0.3 -0.3 to VLCD + 0.3 -0.3 to VDD + 0.3 -0.3 to VLCD + 0.3 300 3 5 150 -40 to +85 -55 to +125 Unit V V V V V V V A mA mA mW C C
Note: The LC75833JE does not have the S12, S23, S24, S35 output pins.
Allowable Operating Ranges at Ta = -40 to +85C, VSS = 0 V
Ratings Parameter Supply voltage Symbol VDD VLCD VLCD1 VLCD2 VIH VIL ROSC COSC fOSC tds tdh tcp tcs tch toH toL tr tf tc VDD VLCD VLCD1 VLCD2 CE, CL, DI, INH CE, CL, DI, INH OSC OSC OSC CL, DI: Figure 2 CL, DI: Figure 2 CE, CL: Figure 2 CE, CL: Figure 2 CE, CL: Figure 2 CL: Figure 2 CL: Figure 2 CE, CL, DI: Figure 2 CE, CL, DI: Figure 2 INH, CE: Figure 3 10 19 160 160 160 160 160 160 160 160 160 0.8 VDD 0 39 1000 38 76 Conditions min 2.7 2.7 2/3 VLCD 1/3 VLCD typ max 6.0 6.0 VLCD VLCD 6.0 0.2 VDD Unit V V V V V V k pF kHz ns ns ns ns ns ns ns ns ns s
Input voltage Input high-level voltage Input low-level voltage Recommended external resistance Recommended external capacitance Guaranteed oscillation range Data setup time Data hold time CE wait time CE setup time CE hold time High-level clock pulse width Low-level clock pulse width Rise time Fall time INH switching time
No. 5580-2/19
LC75833E, 75833W, 75833JE
Electrical Characteristics for the Allowable Operating Ranges
Ratings Parameter Hysteresis width Input high level current Input low level current Symbol VH IIH IIL VOH 1 Output high-level voltage VOH 2 VOH 3 VOL 1 Output low-level voltage VOL 2 VOL 3 VMID 1 VMID 2 Output middle-level voltage*1 VMID 3 VMID 4 VMID 5 Oscillator frequency fOSC IDD 1 IDD 2 ILCD 1 Current drain ILCD 2 ILCD 3 Conditions CE, CL, DI, INH CE, CL, DI, INH; VI = 6.0 V CE, CL, DI, INH; VI = 0 V S1 to S35; IO = -20 A COM1 to COM3; IO = -100 A P1 to P8; IO = -1 mA S1 to S35; IO = 20 A COM1 to COM3; IO = 100 A P1 to P8; IO = 1 mA COM1 to COM3; 1/2 bias, IO = 100 A S1 to S35; 1/3 bias, IO = 20 A S1 to S35; 1/3 bias, IO = 20 A COM1 to COM3; 1/3 bias, IO = 100 A COM1 to COM3; 1/3 bias, IO = 100 A OSC; ROSC = 39 k COSC = 1000 pF VDD; power saving mode VDD; VDD = 6.0 V, output open, fosc = 38 k Hz VLCD; power saving mode VLCD; VLCD = 6.0 V, output open 1/2 bias, fosc = 38 k Hz VLCD; VLCD = 6.0 V, output open 1/3 bias, fosc = 38 k Hz 250 1/2 VLCD - 0.9 2/3 VLCD - 0.9 1/3 VLCD - 0.9 2/3 VLCD - 0.9 1/3 VLCD - 0.9 30.4 38 -5.0 VLCD - 0.9 VLCD - 0.9 VLCD - 0.9 0.9 0.9 0.9 1/2 VLCD + 0.9 2/3 VLCD + 0.9 1/3 VLCD + 0.9 2/3 VLCD + 0.9 1/3 VLCD + 0.9 45.6 5 500 5 100 60 200 120 min typ 0.1 VDD 5.0 max Unit V A A V V V V V V V V V V V kHz A A A A A
Note: *1 Excluding the bias voltage generation divider resistors built in the VLCD1 and VLCD2. (See Figure 1.) The LC75833JE does not have the S12, S23, S24, S35 output pins.
No. 5580-3/19
LC75833E, 75833W, 75833JE
VLCD
VLCD1 To the common segments drivers VLCD2 Except these resistors
VSS
A06550
Figure 1
1. When CL is stopped at the low level
VIH CE toH CL
VIH 50% VIL
VIL toL
tr DI
VIH VIL
tf
tcp
tcs
tch
tds
tdh
A06551
2. When CL is stopped at the high level
VIH CE toL CL tf DI tds tdh
A06552
VIL toH
VIH 50% VIL
tr
VIH VIL
tcp
tcs
tch
Figure 2
No. 5580-4/19
LC75833E, 75833W, 75833JE
Pin Assignments
COM1 S35 S34 S33 S32 S31 S30 S29 S28 S27 S26 S25 COM2 COM1 S34 S33 S32 S31 S30 S29 S28 S27 S26 COM3 VDD VLCD VLCD1 VLCD2 VSS OSC INH CE CL DI 33 34 23 22
COM2 COM3 VDD VLCD VLCD1 VLCD2 VSS OSC INH CE CL DI
36 37
25 24
LC75833E LC75833W
48 1
13 12
S24 S23 S22 S21 S20 S19 S18 S17 S16 S15 S14 S13
LC75833JE
44 1
12 11
S25 S22 S21 S20 S19 S18 S17 S16 S15 S14 S13
P1/S1 P2/S2 P3/S3 P4/S4 P5/S5 P6/S6 P7/S7 P8/S8 S9 S10 S11 S12
P1/S1 P2/S2 P3/S3 P4/S4 P5/S5 P6/S6 P7/S7 P8/S8 S9 S10 S11
A06549
A06582
Block Diagram
COM3 COM2 COM1 S9 S8/P8 S2/P2 S1/P1
A06553
Common driver INH Clock generator
S35 S34
Segment driver & latch
OSC VDD VLCD VLCD1 VLCD2 VSS
Shift register
Address detector
DI
CL
Note: The LC75833JE does not have the S12, S23, S24, S35 output pins.
CE
No. 5580-5/19
LC75833E, 75833W, 75833JE
Pin Functions
Pin No. Pin S1/P1 to S8/P8 S9 to S35 COM1 COM2 COM3 OSC CE CL DI
LC75833E, 75833W LC75833JE
Functions Segment outputs for displaying the display data transferred by serial data input. The pins S1/P1 to S8/P8 can be used as general-purpose output ports when so set up by the control data. Common driver outputs. The frame frequency fO is given by: fO = (fOSC/384) Hz. Oscillator connection An oscillator circuit is formed by connecting an external resistor and capacitor to this pin. Serial data transfer inputs. These pins are connected to the control microprocessor. CE: Chip enable CL: Synchronization clock DI: Transfer data
Active
I/O
Handling when unused
1 to 8 9 to 35 36 37 38 44 46 47 48
1 to 8 9 to 31 32 33 34 40 42 43 44
--
O
Open
--
O
Open
-- H
I/O
VDD
I --
GND
INH
45
41
Display off control input *INH = low (VSS): Off S1/P1 to S8/P8 = Low (These pins are forcibly set to the segment output port function and fixed at the VSS level.) S9 to S35 = Low (VSS), COM1 to COM3 = Low (VSS) *INH = high (VDD): On Note that serial data transfers can be performed when the display is forced off by this pin. Used to apply the LCD drive 2/3-bias voltage externally. This pin must be connected to VLCD2 when 1/2-bias drive is used. Used to apply the LCD drive 1/3-bias voltage externally. This pin must be connected to VLCD1 when 1/2-bias drive is used. Logic block power supply. Provide a voltage in the range 2.7 to 6.0 V. LCD driver block power supply. Provide a voltage in the range 2.7 to 6.0 V. Ground pin. Connect to ground.
L
I
GND
VLCD1 VLCD2 VDD VLCD VSS
41
37
--
I
Open
42 39 40 43
38 35 36 39
-- -- -- --
I -- -- --
Open -- -- --
Note: The LC75833JE does not have the S12, S23, S24, S35 output pins.
No. 5580-6/19
LC75833E, 75833W, 75833JE
Serial Data Transfer Format
1. When CL is stopped at the low level
CE
CL
DI
0 B0
1 B1
1 B2
0 B3
0 A0
0 A1
1 A2
0 A3
D1
D2
D3
D32 D33 D34 D35 D36
0
0
0
P0
P1
P2
P3
DR
SC
BU
0
0
CCB address 8 bits
Display data 36 bits
Control data 10 bits
DD 2 bits
0 B0
1 B1
1 B2
0 B3
0 A0
0 A1
1 A2
0 A3
D37
D38 D39
D68 D69 D70 D71 D72
0
0
0
0
0
0
0
0
0
0
0
1
CCB address 8 bits
Display data 36 bits
Fixed data 10 bits
DD 2 bits
0 B0
1 B1
1 B2
0 B3
0 A0
0 A1
1 A2
0 A3
D73
D74 D75
D104 D105
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
CCB address 8 bits
Display data 33 bits
Fixed data 13 bits
DD 2 bits
A06554
Note: DD ... Direction data
No. 5580-7/19
LC75833E, 75833W, 75833JE 2. When CL is stopped at the high level
CE
CL
DI
0 B0
1 B1
1 B2
0 B3
0 A0
0 A1
1 A2
0 A3
D1
D2
D3
D32 D33 D34 D35 D36
0
0
0
P0
P1
P2
P3
DR
SC
BU
0
0
CCB address 8 bits
Display data 36 bits
Control data 10 bits
DD 2 bits
0 B0
1 B1
1 B2
0 B3
0 A0
0 A1
1 A2
0 A3
D37 D38 D39
D68 D69 D70 D71 D72
0
0
0
0
0
0
0
0
0
0
0
1
CCB address 8 bits
Display data 36 bits
Fixed data 10 bits
DD 2 bits
0 B0
1 B1
1 B2
0 B3
0 A0
0 A1
1 A2
0 A3
D73 D74 D75
D104 D105
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
CCB address 8 bits
Display data 33 bits
Fixed data 13 bits
DD 2 bits
A06555
Note: DD ... Direction data * CCB address...............46H * D1 to D105.................Display data (At the LC75833JE, the display data D34 to D36, D67 to D72, D103 to D105 must be set to 0. * P0 to P3 ......................Segment output port/general-purpose output port switching control data * DR ..............................1/2-bias drive or 1/3-bias drive switching control data * SC...............................Segments on/off control data * BU ..............................Normal mode/power-saving mode control data
No. 5580-8/19
LC75833E, 75833W, 75833JE
Serial Data Transfer Examples
* At the LC75833E and LC75833W when 73 or more segments are used, at the LC75833JE when 64 or more segments are used. 144 bits of serial data must be sent.
8 bits 0 B0 1 B1 1 B2 0 B3 0 A0 0 A1 1 A2 0 A3 D1 D2 D3 D31 D32 D33 D34 D35 D36 48 bits 0 0 0 P0 P1 P2 P3 DR SC BU 0 0
0 B0
1 B1
1 B2
0 B3
0 A0
0 A1
1 A2
0 A3
D37 D38 D39
D67 D68 D69 D70 D71 D72
0
0
0
0
0
0
0
0
0
0
0
1
0 B0
1 B1
1 B2
0 B3
0 A0
0 A1
1 A2
0 A3
D73 D74 D75
D103 D104 D105
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
A06556
Note: At the LC75833JE, the display data D34 to D36, D67 to D72, D103 to D105 must be set to 0.
* At the LC75833E and LC75833W when used with less than 73 segments, at the LC75833JE when used with less than 64 segments. Transfer either 48 bits or 96 bits of serial data depending on the number of segments used. However, the serial data shown in the figure below (the display data D1 to D36 and the control data) must be sent.
8 bits 0 B0 1 B1 1 B2 0 B3 0 A0 0 A1 1 A2 0 A3
A06557
48 bits D1 D2 D3 D31 D32 D33 D34 D35 D36 0 0 0 P0 P1 P2 P3 DR SC BU 0 0
Note: At the LC75833JE, the display data D34 to D36 must be set to 0.
Control Data Functions
1. P0 to P3: Segment output port/general-purpose output port switching control data. These control data bits switch the S1/P1 to S8/P8 output pins between their segment output port and general-purpose output port functions.
Control data P0 0 0 0 0 0 0 0 0 1 P1 0 0 0 0 1 1 1 1 0 P2 0 0 1 1 0 0 1 1 0 P3 0 1 0 1 0 1 0 1 0 S1/P1 S1 P1 P1 P1 P1 P1 P1 P1 P1 S2/P2 S2 S2 P2 P2 P2 P2 P2 P2 P2 S3/P3 S3 S3 S3 P3 P3 P3 P3 P3 P3 Output pin states S4/P4 S4 S4 S4 S4 P4 P4 P4 P4 P4 S5/P5 S5 S5 S5 S5 S5 P5 P5 P5 P5 S6/P6 S6 S6 S6 S6 S6 S6 P6 P6 P6 S7/P7 S7 S7 S7 S7 S7 S7 S7 P7 P7 S8/P8 S8 S8 S8 S8 S8 S8 S8 S8 P8
Note: Sn (n = 1 to 8): Segment output ports Pn (n = 1 to 8): General-purpose output ports
No. 5580-9/19
LC75833E, 75833W, 75833JE Also note that when the general-purpose output port function is selected, the output pins and the display data will have the correspondences listed in the tables below.
Output pin S1/P1 S2/P2 S3/P3 S4/P4 Corresponding display data D1 D4 D7 D10 Output pin S5/P5 S6/P6 S7/P7 S8/P8 Corresponding display data D13 D16 D19 D22
For example, if the output pin S4/P4 has the general-purpose output port function selected, it will output a high level (VLCD) when the display data D10 is 1, and will output a low level (VSS) when D10 is 0. 2. DR: 1/2-bias drive or 1/3-bias drive switching control data This control data bit selects either 1/2-bias drive or 1/3-bias drive.
DR 0 1 Drive type 1/3-bias drive 1/2-bias drive
3. SC: Segments on/off control data This control data bit controls the on/off state of the segments.
SC 0 1 Display state On Off
However, note that when the segments are turned off by setting SC to 1, the segments are turned off by outputting segment off waveforms from the segment output pins. 4. BU: Normal mode/power-saving mode control data This control data bit selects either normal mode or power-saving mode.
BU 0 1 Normal mode Power saving mode (The OSC pin oscillator is stopped, and the common and segment output pins go to the VSS level. However, the S1/P1 to S8/P8 output pins that are set to be general-purpose output ports by the control data P0 to P3 can be used as generalpurpose output ports.) Mode
No. 5580-10/19
LC75833E, 75833W, 75833JE
Display Data to Segment Output Pin Correspondence
Segment output pin S1/P1 S2/P2 S3/P3 S4/P4 S5/P5 S6/P6 S7/P7 S8/P8 S9 S10 S11 S12 S13 S14 S15 S16 S17 S18 COM1 D1 D4 D7 D10 D13 D16 D19 D22 D25 D28 D31 D34 D37 D40 D43 D46 D49 D52 COM2 D2 D5 D8 D11 D14 D17 D20 D23 D26 D29 D32 D35 D38 D41 D44 D47 D50 D53 COM3 D3 D6 D9 D12 D15 D18 D21 D24 D27 D30 D33 D36 D39 D42 D45 D48 D51 D54 Segment output pin S19 S20 S21 S22 S23 S24 S25 S26 S27 S28 S29 S30 S31 S32 S33 S34 S35 COM1 D55 D58 D61 D64 D67 D70 D73 D76 D79 D82 D85 D88 D91 D94 D97 D100 D103 COM2 D56 D59 D62 D65 D68 D71 D74 D77 D80 D83 D86 D89 D92 D95 D98 D101 D104 COM3 D57 D60 D63 D66 D69 D72 D75 D78 D81 D84 D87 D90 D93 D96 D99 D102 D105
Note: This applies to the case where the S1/P1 to S8/P8 output pins are set to be segment output ports. The LC75833JE do not have the S12, S23, S24, S35 output pins.
For example, the table below lists the segment output states for the S11 output pin.
Display data D31 0 0 0 0 1 1 1 1 D32 0 0 1 1 0 0 1 1 D33 0 1 0 1 0 1 0 1 Segment output pin (S11) state The LCD segments corresponding to COM1 to COM3 are off. The LCD segments corresponding to COM3 is on. The LCD segments corresponding to COM2 is on. The LCD segments corresponding to COM2 and COM3 are on. The LCD segments corresponding to COM1 is on. The LCD segments corresponding to COM1 and COM3 are on. The LCD segments corresponding to COM1 and COM2 are on. The LCD segments corresponding to COM1 to COM3 are on.
No. 5580-11/19
LC75833E, 75833W, 75833JE
1/3-Duty 1/2-Bias Drive Technique
fosc [Hz] 384 VLCD COM1 VLCD1, VLCD2 0V VLCD COM2 VLCD1, VLCD2 0V VLCD COM3 VLCD1, VLCD2 0V
LCD driver output when all LCD segments corresponding to COM1, COM2, and COM3 are turned off.
VLCD VLCD1, VLCD2 0V
LCD driver output when only LCD segments corresponding to COM1 are on (lit).
VLCD VLCD1, VLCD2 0V
LCD driver output when only LCD segments corresponding to COM2 are on.
VLCD VLCD1, VLCD2 0V
LCD driver output when LCD segments corresponding to COM1 and COM2 are on.
VLCD VLCD1, VLCD2 0V
LCD driver output when only LCD segments corresponding to COM3 are on.
VLCD VLCD1, VLCD2 0V
LCD driver output when LCD segments corresponding to COM1 and COM3 are on.
VLCD VLCD1, VLCD2 0V
LCD driver output when LCD segments corresponding to COM2 and COM3 are on.
VLCD VLCD1, VLCD2 0V
LCD driver output when all LCD segments corresponding to COM1, COM2, and COM3 are on.
VLCD VLCD1, VLCD2 0V
A06558
1/3-Duty 1/2-Bias Waveforms
No. 5580-12/19
LC75833E, 75833W, 75833JE
1/3-Duty 1/3-Bias Technique
fosc [Hz] 384 COM1 VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V
COM2
COM3
LCD driver output when all LCD segments corresponding to COM1, COM2, and COM3 are turned off.
LCD driver output when only LCD segments corresponding to COM1 are on (lit).
LCD driver output when only LCD segments corresponding to COM2 are on.
LCD driver output when LCD segments corresponding to COM1 and COM2 are on.
LCD driver output when only LCD segments corresponding to COM3 are on.
LCD driver output when LCD segments corresponding to COM1 and COM3 are on.
LCD driver output when LCD segments corresponding to COM2 and COM3 are on.
LCD driver output when all LCD segments corresponding to COM1, COM2, and COM3 are on.
A06559
1/3-Duty 1/3-Bias Waveforms
No. 5580-13/19
LC75833E, 75833W, 75833JE
The INH pin and Display Control
Since the LSI internal data (the display data and the control data) is undefined when power is first applied, applications should set the INH pin low at the same time as power is applied to turn off the display (LC75833E, LC75833W: This sets the S1/P1 to S8/P8, S9 to S35, and COM1 to COM3 to the VSS level. LC75833JE: This sets the S1/P1 to S8/P8, S9 to S11, S13 to S22, S25 to S34, and COM1 to COM3 to the VSS level.) and during this period send serial data from the controller. The controller should then set the INH pin high after the data transfer has completed. This procedure prevents meaningless displays at power on. (See Figure 3.)
Notes on the Power On/Off Sequences
Applications should observe the following sequence when turning the LC75833E, LC75833W, and LC75833JE power on and off. * At power on: Logic block power supply (VDD) on LCD driver block power supply (VLCD) on * At power off: LCD driver block power supply (VLCD) off Logic block power supply (VDD) off However, if the logic and LCD driver block use a shared power supply, then the power supplies can be turned on and off at the same time.
t1 VDD VLCD INH tc CE D1 to D36 Internal data P0 to P3 DR, SC, BU Internal data (D37 to D72) Internal data (D73 to D105)
Display and control data transfer
t2 t3
VIL VIL
Undefined
Defined
Undefined
Undefined
Defined
Undefined
Undefined
Defined
Undefined
Note: t1 0 t2 > 0 t3 0 (t2 > t3) tc ... 10 s min
Note: At the LC75833JE, the display data D34 to D36, D67 to D72, D103 to D105 must be set to 0.
A06560
Figure 3
Notes on Controller Transfer of Display Data
Since the LC75833E, LC75833W, and LC75833JE accept display data divided into three separate transfer operations, we recommend that applications transfer all of the display data within a period of less than 30 ms to prevent observable degradation of display quality.
No. 5580-14/19
LC75833E, 75833W, 75833JE
Sample Application Circuit 1
1/2 Bias (for use with normal size panels) * LC75833E, LC75833W
(P1) (P2) *2 OSC (P8) General-purpose output ports Used for functions such as backlight control
+3 V
VDD VSS
+5 V
VLCD VLCD1 C 0.047 F C VLCD2 INH CE CL DI P8/S8 S9
From the controller
S33 S34 S35
LCD panel (up to 105 segments)
COM1 COM2 COM3 P1/S1 P2/S2
A06561
Note: *2 When a capacitor except the recommended external capacitance (COSC = 1000 pF) is connected the OSC pin, we recommend that applications connect the OSC pin with a capacitor in the range 220 to 2200pF.
* LC75833JE
(P1) (P2) *2 OSC (P8) General-purpose output ports Used for functions such as backlight control
+3 V
VDD VSS
+5 V
VLCD VLCD1 C 0.047 F C VLCD2 INH CE CL DI P8/S8 S9 S10 S11 S13 S22 S25 S34
From the controller
LCD panel (up to 93 segments)
COM1 COM2 COM3 P1/S1 P2/S2
A06583
Note: *2 When a capacitor except the recommended external capacitance (COSC = 1000 pF) is connected the OSC pin, we recommend that applications connect the OSC pin with a capacitor in the range 220 to 2200pF.
No. 5580-15/19
LC75833E, 75833W, 75833JE
Sample Application Circuit 2
1/2 Bias (for use with large panels) * LC75833E, LC75833W
(P1) (P2) *2 OSC (P8) General-purpose output ports Used for functions such as backlight control
+3 V
VDD VSS
+5 V R C 0.047 F 10k R 1k C R
VLCD VLCD1 VLCD2 INH CE CL DI P8/S8 S9
From the controller
S33 S34 S35
LCD panel (up to 105 segments)
COM1 COM2 COM3 P1/S1 P2/S2
A06562
Note: *2 When a capacitor except the recommended external capacitance (COSC = 1000 pF) is connected the OSC pin, we recommend that applications connect the OSC pin with a capacitor in the range 220 to 2200pF.
* LC75833JE
(P1) (P2) *2 OSC (P8) General-purpose output ports Used for functions such as backlight control
+3 V
VDD VSS
+5 V R C 0.047 F 10k R 1k C R
VLCD VLCD1 VLCD2 P8/S8 S9 S10 S11 S13 S22 S25 S34
From the controller
INH CE CL DI
LCD panel (up to 93 segments)
COM1 COM2 COM3 P1/S1 P2/S2
A06584
Note: *2 When a capacitor except the recommended external capacitance (COSC = 1000 pF) is connected the OSC pin, we recommend that applications connect the OSC pin with a capacitor in the range 220 to 2200pF.
No. 5580-16/19
LC75833E, 75833W, 75833JE
Sample Application Circuit 3
1/3 Bias (for use with normal size panels) * LC75833E, LC75833W
(P1) (P2) *2 OSC (P8) General-purpose output ports Used for functions such as backlight control
+3 V
VDD VSS
+5 V
VLCD VLCD1 P8/S8 S9
C 0.047 F
C
C
VLCD2 INH CE CL DI
From the controller
S33 S34 S35
LCD panel (up to 105 segments)
COM1 COM2 COM3 P1/S1 P2/S2
A06562
Note: *2 When a capacitor except the recommended external capacitance (COSC = 1000 pF) is connected the OSC pin, we recommend that applications connect the OSC pin with a capacitor in the range 220 to 2200pF.
* LC75833JE
(P1) (P2) *2 OSC (P8) General-purpose output ports Used for functions such as backlight control
+3 V
VDD VSS
+5 V
VLCD VLCD1 P8/S8 S9 S10 S11 S13 S22 S25 S34
C 0.047 F From the controller
C
C
VLCD2 INH CE CL DI
LCD panel (up to 93 segments)
COM1 COM2 COM3 P1/S1 P2/S2
A06584
Note: *2 When a capacitor except the recommended external capacitance (COSC = 1000 pF) is connected the OSC pin, we recommend that applications connect the OSC pin with a capacitor in the range 220 to 2200pF.
No. 4801-17/19
LC75833E, 75833W, 75833JE
Sample Application Circuit 4
1/3 Bias (for use with large panels) * LC75833E, LC75833W
(P1) (P2) *2 OSC (P8) General-purpose output ports Used for functions such as backlight control
+3 V
VDD VSS
+5 V R R C 0.047 F 10 k R 1 k From the controller C C R
VLCD VLCD1 VLCD2 INH CE CL DI P8/S8 S9
S33 S34 S35
LCD panel (up to 105 segments)
COM1 COM2 COM3 P1/S1 P2/S2
A06563
Note: *2 When a capacitor except the recommended external capacitance (COSC = 1000 pF) is connected the OSC pin, we recommend that applications connect the OSC pin with a capacitor in the range 220 to 2200pF.
No. 5580-18/19
LC75833E, 75833W, 75833JE * LC75833JE
(P1) (P2) *2 OSC (P8) General-purpose output ports Used for functions such as backlight control
+3 V
VDD VSS
+5 V R R C 0.047 F 10 k R 1 k From the controller C C R
VLCD VLCD1 VLCD2 INH CE CL DI P8/S8 S9 S10 S11 S13 S22 S25 S34
LCD panel (up to 93 segments)
COM1 COM2 COM3 P1/S1 P2/S2
A06585
Note: *2 When a capacitor except the recommended external capacitance (COSC = 1000 pF) is connected the OSC pin, we recommend that applications connect the OSC pin with a capacitor in the range 220 to 2200pF.
s No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. s Anyone purchasing any products described or contained herein for an above-mentioned use shall: x Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use: Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. s Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of March 1998. Specifications and information herein are subject to change without notice. PS No. 5580-19/19

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